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How to Reduce IR Drop || What is IR Drop # #thesiliconvlsi #interview #vlsi #viral
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May 11, 2025
How to Reduce IR Drop || What is IR Drop # #thesiliconvlsi #interview #vlsi #viral #IRDropReduction #ElectronicsTutorial #CircuitDesign #PCBDesign #ElectricalEngineering Effective Methods to Reduce IR Drop in PCB Design Top Tips for Minimizing IR Drop in Electronic Circuits How to Address IR Drop Issues in Circuit Design IR Drop Solutions Enhancing Your PCB Performance Comprehensive Guide to Reducing IR Drop in Electronics 🌐https://siliconvlsi.com/ 🤝https://www.linkedin.com/groups/13053454/ 📌https://in.pinterest.com/siliconvlsi/
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0:01
hello everyone welcome back to my
0:03
Channel today we are going to discuss
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about the important topic for anyone who
0:08
is working in electronic
0:10
circuit that is called a drop if you
0:14
ever notice your circuit not performing
0:16
as expected IR drop might be the issue
0:21
but don't worry by the end of the this
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video you will get to know exactly how
0:26
to minimize it and keep your circuit
0:29
running
0:31
smoothly so what is aod drop first thing
0:35
let's talk what is the irod drop IOD
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drop or a voltage rope happen due to the
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resistance in the
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conductors when current flow through the
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conductor the resistance causes a
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voltage drop along the path this can
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lead insufficient voltage level at the
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critical point in your
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circuit impedance performance and
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reability
1:02
why aod drop is
1:05
important why should we care about aod
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drop well in high-speed digital and
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analog system even a small voltage drop
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can cause a significant issue component
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may not receive adaptive voltage leading
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to malfunction or degrading performance
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in extremely cases it can even Co cause
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your whole circuit to be failed so
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improving ey drop is a crucial for
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ensuring your circuit work and
1:45
intent so let's talk how can we improve
1:49
the high drop in our
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layout I have a 7 years of experience in
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analog and mixed signal layout design
1:58
engineer So based on my experience I
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will tell you how can we improve the IOD
2:04
drop in our layout if you have any
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question or any answer related this
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please do comment so let's talk about
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how can we improve the I
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drop first thing is in our Asen L design
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engineer we should increase the metal
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width or we should avoid the jogs or
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bend in our layout if your layout looks
2:29
good
2:30
then definitely the performance will
2:33
also are
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good second approach is put more number
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of fires yeah of course if you have a
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more number of fires instead of single
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wire you should put a double wire or a
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square wire or a bar wire so with that
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we can improve IR drop third point is
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jump for higher metal so as an layout
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design engineer if you don't have any
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any option
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by increase width you cannot if you
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cannot improve the I drop you have to
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jump for higher metal because higher
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metal have a higher thickness then so
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the higher thickness have a lesser
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resistance so obviously High drop will
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reduce fourth thing is Place power
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source to close to
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load the shorter the distance between
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your power SCE and the load the the
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lower resistance and thus I drop try to
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place voltage regulator and power source
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as close to component they are powering
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as
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possible next thing is optimize stress
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routing keep your power and grounding
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tress as short as possible and wide as
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possible wider tress have a lesson
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resistance which help in reducing the
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IOD drop so what it says you have to
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design such a good power mesh power Plan
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before starting layout you have to you
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know do a good PG routing stance called
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power power and ground routing in the
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topmost layer so this that will improve
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a drop that is the main thing for layout
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design another strategy is decoupling
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capacitors best decoupling capacitors
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close to your IC this capacitors help to
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maintain the stable voltage level by
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providing a local Reser of charge which
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can reduce the effect of a do this is
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very important thing we have to place
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decoupling capacitance in a like empty
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region you know deing capacitor will
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help in two thing first thing is improve
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the a drop and second thing is to
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maintain the density if you have empty
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space tool will automatically fill that
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portion with dummy fill instead of that
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if you put the decoupling capacitor it
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would be help for to avoid the density
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mean density related issue and plus this
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IR drop it will help us to improve the I
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drop so you have to fill empty area with
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decoupling
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capacitor another strategy is thermal
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management
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excessive heat can increase the
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resistance of your conductor ensure your
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PCB or layout include a proper thermal
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management technique such as head sink
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thermal wires and adaptive ventilation
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in your
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layout so this this is the strategy so
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we can use in our layout to improve the
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I drop so if you have any question or if
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you have any comment related this how
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can we improve the drop please do the
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comment in comment box and if you have a
6:05
layout related any question just put it
6:09
into comment we will
6:11
discuss thank you for watching this
6:13
video if you like Please Subscribe my
6:15
channel thank you so much
#Electronics & Electrical