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Hello friends welcome to Silicon vsi
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today we will discuss about which metal
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layer has a higher capacitance value the
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lower metal layer or the higher metal
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layer so this is our topic before that I
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just want to explain you what is the
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metal stti in our vsi design or vsi
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layout so you can see here the lower
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metal means M1 M2 M3 M4 M5 in the higher
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like this way so each technology has a
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different different metal stick and in a
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technology itself has a different
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different metal stick If You observe in
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your layout so this is BAS layer base
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metal so if you notice here the from M1
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to M5 thickness of metal is same from B1
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to B 3 thickness is same E1 to E2
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thickness is do you know why it is if
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you know just do comment or if you don't
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know just do comment I will let you know
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in my le next video so yes so lower
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metal means M1 M2 and the higher metal
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means topmost metal so next now we will
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see the capacitance how it is there in
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layout like which related to metal to
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metal capacitance and the metal to
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substrate capacitance here this
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capacitance is very important thing
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metal to substrate capacitance it is a
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very important thing which we don't
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consider in our layout design so this we
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know we already know metal to metal
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capacitance we already know but metal to
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substrate capacitance also play
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significant role in a layout design in
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especially in a lower technology node
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like 7 nanometer 5 nanometer 3 nanometer
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this capacitance is a very dominant
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capacitance so that's why I I will
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discuss about which capacitance is more
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and I think you will get you you already
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get to know what I'm talking about out
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so metal to metal capacitance is this
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occur between adjust and metal layer
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metal to substrate capacitance is happen
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between metal and to Silicon substrate
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so if I don't draw the cross-section of
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nmos it will look like this and this is
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substrate this is y and now I'll draw
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the metal on the top this is metal one
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one this is n+ this is n plus this is p
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M1 so if you see and somewhere metal top
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metal will come on the top side
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here in between Y is there so if you
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notice here M1 is very close to the
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substrate so we have a capacitance
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formula Epsilon 0 a by
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D so right now M1 is very close to
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substrate so there are two kind of
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capacitance will play important role for
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M for M1 and the if you see this top
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metal it is very far from the substrate
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so it has a less capacitance so overall
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what I mean to say is lower metal like
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M1 M2 are much closer to the Silicon
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substrate due to the this proximity
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metals to substrate capacitance
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significant High as I explained earlier
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previous slide additionally lower metal
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layer tend to have a smaller width and
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the pitch it is also helped to increase
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the parasitic capacitance with adjust
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layer there are two factor for M1 is
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it's width and height is thickness is
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also very small so it is also play
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significant role and the for higher
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metal like M7 M6 they farther away from
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the substrate and they experience much
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lower metal to substrate
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capacitance and especially they're also
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spaces space farther apart compared to
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the lower layer reducing the metal to
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capacitance so this is how we can say in
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conclusion so if any interviewer ask you
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which capacitance is more so you have to
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Clearly say that lower metal layer has a
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higher capacitance as compared to higher
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metal layer if they ask you reason you
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just need to explain him or them
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like why lower metal L has a higher
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capacit you have to give two thing one
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thing is metal to substrate distance is
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very small so substrate capacitance also
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plays significant role so in this
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lecture so substrate is important thing
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to explain them substrate is play very
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important role for a base metal so so
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that's why for a critical signal we
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always choose higher metal like M2
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M3 if you don't know like you can do the
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one experiment you draw like let's
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assume your layout is LVS and DRC clean
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you run the extraction now for your
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experiment if you route particular
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sensitive signal with M1 you just try to
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make to jump in M3 and then you compare
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the that extraction results like you
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know coupling cap or coupling uh like
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Clum or coupled RC you will see the
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difference this is occur in lower
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technology not especially in lower
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technology for so our advice is for
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signal you better to routing in metal 3
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or top metal like I cannot say top level
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because top level occupied occupied for
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for the power in ground signal so better
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M1 so this is how this uh lecture is end
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here so if you have any question related
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this please do comment if you want to
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know about metal stti or how many metal
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stick is there how metal STI will behave
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why we need that metal St different
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different metal stti you can do comment
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if you want more detail please visit our
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website called silicon vs.com if you
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like this video please subscribe thank
