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Home»Memory Layout Design»Duty Cycle & Pulse Width
Memory Layout Design

Duty Cycle & Pulse Width

siliconvlsiBy siliconvlsiJune 11, 2023Updated:October 29, 2024No Comments1 Min Read
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Duty Cycle

When you look at the duty cycle, you’re seeing it defined as the ratio of on-time to the total time (on-time plus off-time). The rise and fall transitions dictate the lengths of on-time and off-time. But in real situations, these transitions aren’t identical, so the duty cycle can fluctuate, leading to less accurate calculations. For example, in the image, the input starts with a 50%-50% balance between rise and fall transitions. After passing through certain components, though, you’ll notice around an 8% variation in both rise and fall times.

The Pulse Width

The pulse width, on the other hand, is affected by variations in the rise and fall transitions compared to the input transitions. Consequently, the threshold (50%) deteriorates. This results in a decrease in the pulse width. Reduced pulse width can lead to the loss of data that was meant to be captured at a specific time.

 

 

Duty Cycle & Pulse Width
Duty Cycle & Pulse Width
duty cycle variation in real scenarios rise and fall transitions
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