Central Processing Unit

The Central Processing Unit (CPU), the principal part of any digital computer system, is generally composed of the main memory, control unit, and arithmetic-logic unit. When a computer is executing a program of instructions, the CPU continually fetches (reads) information from those locations in memory that contain the program codes representing the operations to be performed and the data to be operated upon. The CPU will also store (write) data in memory locations as dictated by the program instructions.

The RAM and ROM integrated circuits (ICs) that make up a computer’s primary memory are connected to the CPU by three sets of signal lines or buses. The following, figure shows these as the address lines or address bus, data lines or data bus, control lines or control bus, and control lines or control lines.

These buses each have a number of lines, and the number of lines in each bus varies from one computer to the next. Each line is represented by a single line with a slash. The three buses are essential for the CPU’s ability to write data to and read data from memory.

Central Processing Unit

Read Operation of CPU

The CPU supplies the binary address of the memory location from which data are to be retrieved. It places this address on the address bus lines. #

An address decoder activates the memory device’s enable input (CE or CS).

The CPU activates the appropriate control signal lines for the memory read operation that is normally connected to OE on the memory IC.

The memory ICs internally decode the binary address to determine which location is being selected for the read operation.

The memory ICs place data from the selected memory location onto the data bus, from which they are transferred to the CPU.

Write Operation of CPU

The CPU supplies the binary address of the memory location where the data are to be stored. It places this address on the address bus lines. #

An address decoder activates the memory device’s enable input (CE or CS).

The CPU places the data to be stored on the data bus lines.

The CPU activates the appropriate control signal lines for the memory write operation that is normally connected to WE on the memory IC.

The memory ICs internally decode the binary address to determine which location is being selected for the store operation.
The data on the data bus is transferred to the selected memory location.

Data bus

This bidirectional bus carries data between the CPU and the memory ICs. #

Control bus.

This bus carries control signals from the CPU to the memory ICs. #

Address bus

This unidirectional bus carries the binary address outputs from the CPU to the memory ICs to select one memory location. #

What Central Processing Unit Consists?

The central processing unit is a combination of any digital computer system, generally composed of the main memory, control unit, and arithmetic-logic unit.