Configurable Logic Blocks (CLBs) on an FPGA
A configurable Logic Block (CLB) is the basic repeating logic resource on an FPGA.A set of configurable logic blocks (CLBs) are used in the CLB architecture, a digital logic design, to implement Boolean functions. Many CPLD and FPGA devices use the CLB architecture. The fundamental components of the design, or logic elements (LEs), are found in various numbers within each CLB.
It is linked together by routing resources, the components in CLBs execute complex logic functions, implement memory functions, and also synchronize code on the FPGA. CLBs contain smaller components, include like lip-flops, look-up tables (LUTs), and multiplexers.
What is Flip-Flop?
A flip-flop is the smallest storage resource on the FPGA. and Each flip-flop in a CLB is a binary register used to save logic states between clock cycles on an FPGA circuit.
What is a Look-up Table (LUT)?
A LUT stores a predefined list of outputs for every combination of inputs. The LUTs in a CLB can also implement FIFOs and memory items in LabVIEW.LUTs provide a fast way to retrieve the output of a logic operation because possible results are stored and then referenced rather than calculated.
What is a Multiplexer?
A circuit selects between two or more inputs and then returns the selected input.
What is a slice in VLSI?
A slice is a subset of a one-dimensional array, ranging from a single element to the entire array. The prefix used for a slice is the name of the parent array. The index used for a slice must be within the range of the indexes of the parent array