How to Reduce Substrate Currents
In physical design, it’s crucial to implement countermeasures to mitigate the negative effects of substrate currents efficiently. These countermeasures help direct substrate currents away from sensitive areas and ensure they flow into the metal, which provides a low-resistance path to the ground bond pad. Here are some common countermeasures:
The primary goal is to provide efficient pathways for substrate currents to exit the substrate. This is achieved by strategically placing substrate contacts, which allow the current to flow into the metal layers. To be effective, substrate contacts should be positioned as close as possible to the current path. If they are too far away, the current might spread out into the depths of the substrate, making it difficult to redirect.
Design Rules (Spacings)
Design rules, often defined in the Process Design Kit (PDK), typically specify a maximum spacing between neighboring substrate contacts. These rules enforce a minimum density of substrate contacts across the entire chip. Maintaining an appropriate density ensures that substrate currents have access to efficient exit routes.
When a potential substrate current source is identified, such as in the example mentioned earlier, guard rings can be employed. Guard rings involve placing substrate contacts in close proximity to the current source, ideally surrounding it completely. This arrangement helps capture and redirect substrate currents effectively, preventing them from spreading into undesired regions.
“Currentless” Ground Net
The circuit ground net (GND or VSS) should not be used to connect substrate contacts to the ground bond pad. Instead, a separate net, often referred to as the “SUB” net, should be used in the layout. This SUB net is connected to the bond pad through a star point. Importantly, no current-carrying device pins should be connected to this net. It’s commonly referred to as “currentless” because it carries no standard circuit currents. However, it does serve the purpose of allowing parasitic currents (which are much smaller) to pass from the substrate through this net. This helps maintain a stable ground potential, which is essential for proper device operation.
By implementing these countermeasures, designers can effectively manage and redirect substrate currents, ensuring that they do not adversely affect the performance and reliability of semiconductor devices and circuits.
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