Forum › Tag: Dummy poly problems finFET Select statusStartus:AllOpenResolvedClosedAnsweredUnansweredSelect categoryAllCMOSLayoutMemory LayoutPhysical DesignQuestionsRTL DesignStandard Cell Sort byViewsAnswersVotesWhy is using dummy poly in some standard cell rows considered harmful in FinFET nodes?AnsweredDigitalWorld answered 7 months ago701 views2 answers0 votes
DigitalWorld answered 7 months agoDigitalWorld answered 7 months ago
By siliconvlsiBy siliconvlsiDigitalWorld answered 7 months ago