Forum › Tag: IO Pad Analog Routing Select statusStartus:AllOpenResolvedClosedAnsweredUnansweredSelect categoryAllCMOSLayoutMemory LayoutPhysical DesignQuestionsRTL DesignStandard Cell Sort byViewsAnswersVotesHow would you handle ESD protection layout when the IO pad shares space with analog signal routing?Opensiliconvlsi asked 4 weeks ago • Layout86 views0 answers0 votes