Can non-uniform placement density worsen local timing variation?

Non-uniform placement density can definitely worsen local timing variation. When some areas of a chip are packed tightly with cells and others are sparse, you get differences in local IR drop, temperature, and even metal density. All of these can affect delay.For example, in one of my layouts, the clock buffers placed in a dense region ran slightly slower than those in a sparse area because of higher local heating and IR drop. Once we evened out the placement density using filler and decap cells, the timing became much more consistent.