Types of Cells for Physical Design
In physical design automation, various types of cells are used to fulfill specific design requirements. Here are some of the key types of cells used:
Decap Cells
Decap (decoupling capacitor) cells are temporary capacitors strategically placed in a design between power and ground rails. They are added to mitigate functional failures caused by dynamic IR (voltage drop) during the simultaneous switching of digital circuits. When a high current is drawn from the power grid during active clock edges, decap cells discharge and provide a power boost to counteract IR drop effects. Placing decap cells closer to sequential elements, such as flip-flops, is essential for their effectiveness.
Spare Cells
Spare cells are added during the initial design implementation to provide flexibility for future modifications or repairs. There are two common approaches to adding spare cells:
The designer includes separate modules containing the necessary spare cells. Placement and routing must ensure that these cells are not optimized away by the design tool. Inputs of spare cells are often tied to power or ground nets to prevent floating gates, while outputs are typically left unconnected.
Spare cells can also be integrated into the design by including them directly in the netlist.
Filler Cells
Filler cells are used to maintain continuity in the N-well and implant layers within standard cell rows. Some smaller cells may lack bulk (substrate) connections due to their compact size. In such cases, filler cells are inserted to establish connections between the substrates of small cells and the power/ground nets. This ensures that thin cells can utilize the bulk connection of neighboring cells, addressing substrate connectivity issues.
End Cap Cells
End cap cells serve specific purposes in the design, primarily related to power, ground, and design rule compliance:
- These cells do not have signal connectivity but connect exclusively to power and ground once power rails are generated in the design.
- End cap cells help prevent gaps between well and implant layers, ensuring that design rule check (DRC) violations related to well tie-off requirements for core rows are avoided.
These different types of cells play crucial roles in ensuring the functionality, performance, and manufacturability of integrated circuits during the physical design process. Each type of cell serves a specific purpose in addressing various design challenges and optimizing the layout of digital circuits.