On-chip variation (OCV) is a recognition of the intrinsic variability of semiconductor processes and their impact on factors such as logic timing. It comes due to some variations at the manufacturing level, the speed is not uniform throughout the chip. There is variation in the effective channel length and width of transistors. Due to complexities and variations in submicron technologies, the devices with the same size may have different widths as compared to the idle condition.
A list of on-chip variations
- Static Timings Analysis.
- Variation in temperature.
- Variation in interconnects.
- Variation in transistor width.
- Variation in threshold voltage.
- Variation in the channel length.
Sources of on-chip variation (OCV)
- Etching #
- Photolithography
- Chemical mechanical planarization
Types of Variation in VLSI
- Process Variations
- Global Variations #
- Local Variations
- Voltage Variations
- Temperature Variations
- Aging Effect
Global on-chip variation
If the performance difference comes between the die-to-die, is known as global on-chip variation. It is modeled as operating corners. #
Local on-chip variation
If the performance difference comes between within the same die, is known as Local on-chip variation.