Aging effect in VLSI
Aging effects are described by the classical bathtub curve after a steep initial failure rate, the failures level off for a while before rising again, resulting in a bathtub-like shape for the number of failures as a function of time. Alterations in process parameters, on-chip temperature, and supply voltage level all have a significant impact on how quickly something ages. Here, we provide an overview of analytical techniques for significant aging pathways based on both established and cutting-edge physical models.
List of Aging Effects in VLSI
Electromigration (EM) refers to a phenomenon whereby metallic atoms are transported by electron flow at a high current density. Electromigration causes the formation of defects such as voids and hillocks, which can cause reliability problems such as opens or shorts.
Hot Carrier Injection (HCI)
Hot electrons(HCI) are also generated when the channel is conductive and some electrons may get injected into the gate region and become hot. These electrons create a leakage current instead of flowing the current through the channel region. This leakage current may break an atomic bond, and it may damage the dielectric
Hot carrier injection in MOSFETs occurs when a carrier from the channel is injected into the gate oxide. Eventually, this gate oxide will damage the gate oxide. When electron carrier should have high kinetic energy to reach the conduction or valence band in the oxide.
Hot electrons are usually generated when photons with high energy are shined on the transistors. The gained energy from the photon is transferred to an electron which is ejected out of the valence band and generates either an electron-hole pair.
Bias temperature instability(BTI)
Bias temperature instability is a device aging phenomenon that causes threshold voltage shifts over long periods of time in the presence of voltage stress at the gate, eventually causing the circuit to fail to meet its specifications.
A PMOS transistor in an inverter experiences negative BTI stress when its gate node is at logic 0, and the resulting increase in the threshold voltage is partially reversed when the voltage stress is removed.
A similar phenomenon of positive BTI affects the threshold voltage of NMOS devices when they are stressed, and relaxed the degradation on the removal of stress. The magnitude of degradation depends on the ratio of the stressed time to the unstressed time, i.e., the signal probability (SP) of the gate input. There are two widely-used theories for BTI.
Negative-Bias Temperature Instability (NBTI)
In MOSFETs, a particular type of aging transistor, negative-bias temperature instability (NBTI) is a significant reliability concern. A MOSFET’s drain current and transconductance decrease as a result of an increase in threshold voltage, which is how NBTI presents itself.
A power-law dependence on time is frequently used to approximate the degradation. Positive bias temperature instability (BTI) is less of a problem than negative bias temperature instability (NBTI) for pFETs since the threshold voltage correlates to a negative gate bias.
Time-Dependent Dielectric Breakdown(TDDB)
Time-Dependent Dielectric Breakdown(TDDB) is a phenomenon where the oxide underneath the gate degrades as a result of the electric field in the material. So this is also counted in the aging effect in VLSI.
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