Stress-Induced Voiding (SIV) or Stress Migration in Interconnects
Stress-induced voiding (SIV) or stress migration refers to the movement of metal conductor ions caused by high tensile stresses in the interconnect after certain processing steps, such as passivation deposition. This migration leads to the formation of voids within the metal conductor. The root cause of these stresses is the difference in thermal expansion between the metal layer and the underlying Si-substrate, as well as between the metal and the passivation layer or intermetal dielectric.
The effects of SIV can be detrimental to the performance and reliability of the Ultra-Large Scale Integration (ULSI) chip. Some of the consequences of SIV include changes in resistance, the formation of voids that can lead to open circuits, the growth of hillocks (protrusions), or the development of whiskers (thin filaments) that may cause shorts between lines or layers.
These issues significantly impact the electrical properties of the ULSI chip, especially with the use of advanced copper metallization. Thus, managing stress-induced voiding is important for ensuring the reliability and functionality of integrated circuits, and it remains an important consideration during the design and manufacturing processes.
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