Wells, Taps, and Guard ring.

Most CMOS processes are constructed with a P-type bulk substrate and NMOS devices are constructed by implanting N-type source and drain geometry.

To construct a PMOS device a region of N-type material is needed. The N-type material is called the N-well and it surrounds the P-type source and drains geometry to create the MOSFET channel.

Well has a good electrical connection to power the N-well and ground for the P-well. This connection is achieved by inserting taps and/or guard rings into the layout.

A guard is essentially a ring-shaped tap that wraps around the transistors. Taps and guard rings also reduce the likelihood of latch-up, where a low impedance path between the power rails is formed, creating a damagingly high current through the circuit