ESD in VLSI

ESD occurs when two bodies at different potentials come in direct contact or if there is a high electrostatic field between two objects that are in close proximity.

The electrostatic discharge (ESD) design issues for input, output, and power bus protection of metal-oxide-semiconductor devices. An effective primary circuit for rapidly discharging large amounts of stress current is a thick-oxide device with an optimized layout.

The CMOS chip has an Electrostatic discharge protection circuit at input and ESD is the transfer of charge between two bodies at different potentials.ESD generates high voltage and high peak voltage and high peak current that may damage the IC. 

In submicron technology, the oxide thickness is very thin, therefore the electric field is quite large

As tox decreases Eox Increases and Eox beyond maximum Electric field can withstand and destroy it completely. As a protection, the input pads are not directly connected to the gate of the MOS transistor instead an ESD protection circuit is added between the input pad and the MOSFET gate as the following figure.

During ESD when a highly large positive voltage is applied to the input pad, D1 & D2 undergo breakdown and prevent the transistor from getting damaged.

In the following figure, During normal operation, D1 & D2 are reversed biased. If input voltage > rail voltage, then D1 conducts. If input voltage < ground voltage, then D2 conducts.

What is the purpose of the ESD?

More specifically, ESD (Electrostatic Discharge) equipment is intended to: Prevent the buildup of static electricity. Safely discharge any static electricity that gets generated. Protect people and products from the effects of an accidental discharge.