Soft check or a Stamping conflict at LVS?
Soft check or Stamping conflict Error comes under ERC check. Soft Connect is a node connected through a Highly resistive non-routing layer that leads to poor circuit performance.
This soft check will identify shorts between two or more signals passing through high-resistivity materials such as n-well and p-substrate.
It will come when two or more nets are connected with a high resistive layer (well ).
- If Tap is not connected with power or ground then also it will flag(Floating well or floating p-substrate)
- If Two Nwell is connected in series by Nwell tap through the metal
- If there are any layout nodes with a different name that are connected through some high resistive layers like n-well or p-well substrates then this soft check reports them.
In summary, the main difference between “Stamping conflict” and “Sconnect error” in LVS is that stamping conflicts are primarily concerned with how layout cells are instantiated and organized, while Sconnect errors focus on discrepancies in the electrical connectivity between the layout and the schematic representation of the IC design. Both types of errors are critical to identify and resolve to ensure the accurate and functional implementation of the integrated circuit.
