“Pinch-off happens during saturation mode because of the strong electric fields that are generated within the channel region when a…
Author: siliconvlsi
Top Memory Circuit and Layout Design Interview Question Please add Your Interview questions in the comment box, we will add…
Comparison Between SRAM and DRAM The main reason for SRAM is faster than DRAM, is SRAM has to require six…
How to Become an Analog Layout Engineer Analog layout design is a discipline that deals with the physical implementation of…
Double patterning (DP) Double patterning (DP) is a type of resolution enhancement method in lithography to increase the feature density…
CMOS are voltage control current sources while BJTs are current-controlled current sources. Also, MOS is highly integrable wherein billions of…
CIF (Caltech Intermediate Form) and GDSII (GDS) stream formats are standard layout description languages used to transfer mask-level layouts between organizations(fab)…
Isolation cells Isolation cells must connect input pins to logic ‘0’ to prevent floating input pins in a powered block.…
The antenna Effect in VLSI is also called plasma-induced gate oxide damage, which occurs during the fabrication process. AntennaEffect may…
Following is the input for Physical design. Basic ASIC flow Basic Verilog concepts Understanding of the synthesis process Scripting languages…