Parasitic Capacitance in IC Layouts Parasitics can be of resistance or capacitance types, or both. As the semiconductor industry is…
Author: siliconvlsi
To understand these let’s take the example of PMOS’s current source. The drain current of the source depends on the…
ls command The ls command is used to view the contents of a directory. There are variations you can use with…
What Is The Antenna Effect in VLSI? During the Fabrication Process, a large amount of charge is induced in plasma…
Analog Layout In Analog layout there is a certain requirement for Guarding ring, well,deep-N-well, dummy devices, etc. In a digital…
Fabrication Processes There are serval steps that include in the Fabrication Process. Oxidation Oxidation is a process that converts silicon…
Device isolation Techniques in VLSI For the isolation of neighboring MOS transistors there exist two techniques, namely Local Oxidation of Silicon(LOCOS)…
ESD in VLSI ESD occurs when two bodies at different potentials come in direct contact or if there is a…
List of Second-Order Effects in MOSFET: Subthreshold Current Channel length modulation(CLM) Body effect Mobility variation Tunneling Punch through Impact Ionization…
What is EPI in Silicon VLSI Technology? EPI stands for Epitaxial Silicon layer. The EPI layer is doped appropriately for…