Close Menu
  • Analog Design
    • Latest Analog Layout Interview Questions
  • Digital Design
    • Digital Electronics Interview Question
    • Top VLSI Interview Questions
  • Physical Design
    • Physical Design Interview Questions for VLSI Engineers
  • Verilog
    • Verilog Interview Questions(2026)
  • Forum
  • Calculators
    • Asynchronous FIFO Depth Calculator
    • Clock Skew and Clock Jitter Calculator
    • Setup Time Calculator
Facebook Instagram YouTube LinkedIn WhatsApp
SiliconvlsiSiliconvlsi
Ask Questions Register in Forum Login in Forum
Facebook Instagram YouTube LinkedIn WhatsApp
  • Analog Design
    • Latest Analog Layout Interview Questions
  • Digital Design
    • Digital Electronics Interview Question
    • Top VLSI Interview Questions
  • Physical Design
    • Physical Design Interview Questions for VLSI Engineers
  • Verilog
    • Verilog Interview Questions(2026)
  • Forum
  • Calculators
    • Asynchronous FIFO Depth Calculator
    • Clock Skew and Clock Jitter Calculator
    • Setup Time Calculator
SiliconvlsiSiliconvlsi
Home » » Page 81
VLSI Design

Drain Induced Barrier owering (DIBL) effect

By siliconvlsiApril 1, 20220

Drain Induced Barrier Lowering (DIBL) “Drain ­induced barrier lowering (DIBL) effect which causes a reduction in the threshold voltage as…

VLSI Design

What is surface scattering in MOSFET?

By siliconvlsiApril 1, 20220

Surface scattering in MOSFET Surface scattering occurs when electrons are accelerated toward the surface by the vertical component of the electric…

VLSI Design

What is FinFET Technology

By siliconvlsiMarch 31, 20220

FinFET Technology Nowadays, FinFET technology is being adopted in a variety of forms by IC manufacturers who need to increase…

VLSI Design

VLSI Interview Questions with Answers

By siliconvlsiMarch 30, 20220

Interview Questions with Answers CMOS Inverter CMOS logic, give the various techniques you know to minimize Power Consumption. Crosstalk and…

VLSI Design

Difference Between Higher nodes and Lower nodes in VLSI?

By siliconvlsiMarch 28, 20220

Higher nodes and Lower nodes in VLSI The technology shrinking is going on for decades. since then so many changes…

Physical Design

What are the ways to reduce Metal Resistance?

By siliconvlsiMarch 28, 20220

How do you reduce resistance in a wire? Reduce the run length of metal wire. Increase the metal width. Change…

Digital Design

How you will take care of power in standard cells?

By siliconvlsiMarch 24, 20220

How you will take care of power in standard cells? Depending on the width(or pitch) of the metal layers the…

VLSI Design

How many Vias you will use and how it will help to reduce resistance

By siliconvlsiMarch 24, 20220

Vias Via is a connection between two metals. More than one vias should use for metal-to-metal connections. More vias have…

Digital Design

Understanding minority charge injection

By siliconvlsiMarch 21, 20220

Understanding minority charge injection A p-n junction diode is a two-terminal or two-electrode semiconductor device, which allows the electric current in…

VLSI Design

Temperature Inversion (Impact on Performance)

By siliconvlsiMarch 21, 20220

Temperature Inversion in VLSI There In a lower technology node, as temperature increases the threshold voltage decreases so overdrive voltage…

Load More
Facebook X (Twitter) Instagram Pinterest Vimeo YouTube
  • About Us
  • Contact Us
  • Privacy Policy
© 2026 Siliconvlsi.

Type above and press Enter to search. Press Esc to cancel.