Device isolation Techniques in VLSI For the isolation of neighboring MOS transistors there exist two techniques, namely Local Oxidation of Silicon(LOCOS)…
Author: siliconvlsi
ESD in VLSI ESD occurs when two bodies at different potentials come in direct contact or if there is a…
List of Second-Order Effects in MOSFET: Subthreshold Current Channel length modulation(CLM) Body effect Mobility variation Tunneling Punch through Impact Ionization…
What is EPI in Silicon VLSI Technology? EPI stands for Epitaxial Silicon layer. The EPI layer is doped appropriately for…
What is latchup in CMOS and its prevention Techniques “Latch-up is the state where a semiconductor undergoes a high-current state…
New Technologies in VLSI (2024) The transistor density of chips keeps going up as the process node goes down, and…
Steps to Minimize IR Drop in Integrated Circuit Design IR drop is the electrical potential difference between two ends of…
Electromigration Effect in VLSI Electromigration is the gradual displacement of metal atoms in a semiconductor and It occurs when the current…
Gate-Induced Drain Leakage – An Overview GIDL(Gate Induced Drain Leakage) occurs where the gate partially overlaps with the drain of…
Polysilicon used as a gate contact instead of metal in CMOS The polysilicon gate acts as a mask for the…