Drain Induced Barrier Lowering (DIBL) Drain Induced Barrier Lowering (DIBL) is a short channel effect in MOSFET prominent in ultra-scaled…
Author: siliconvlsi
Difference between DRV(Design Rule Violations) and DRC(Design rule check): DRV(Design Rule Violations) and DRC(Design rule check) are the terms used…
Layout Design Rules – (DRC) DRC helps to check is an essential part of the physical design flow and ensures…
Soft check or a Stamping conflict at LVS? Soft check or Stamping conflict Error comes under ERC check. Soft Connect is…
We used Contact(via0) in between diffusion and poly Because contact(via0) is made with tungsten filament while via1,via2, and via3 are made…
What is the role of ERC in VLSI? ERC stands for Electrical Rule Check. It checks all possibilities of Electrical connection…
What Is Double Patterning in VLSI? “To achieve higher density and better resolution in layout, we used double patterning” Double…
Sense amplifiers Sense amplifiers play a major role in memory circuits and they provide performance speed-up while reducing power dissipation. …
We extend Poly from the diffusion to avoid the short circuit between the source and drain during fabrication. During the…
The following figure may get a clear idea about which is the pin and which is the port. A pin…