Steps to Minimize IR Drop in Integrated Circuit Design IR drop is the electrical potential difference between two ends of…
Electromigration Effect in VLSI Electromigration is the gradual displacement of metal atoms in a semiconductor and It occurs when the current…
Gate-Induced Drain Leakage – An Overview GIDL(Gate Induced Drain Leakage) occurs where the gate partially overlaps with the drain of…
Polysilicon used as a gate contact instead of metal in CMOS The polysilicon gate acts as a mask for the…
Drain Induced Barrier Lowering (DIBL) Drain Induced Barrier Lowering (DIBL) is a short channel effect in MOSFET prominent in ultra-scaled…
Difference between DRV(Design Rule Violations) and DRC(Design rule check): DRV(Design Rule Violations) and DRC(Design rule check) are the terms used…
Layout Design Rules – (DRC) DRC helps to check is an essential part of the physical design flow and ensures…
Soft check or a Stamping conflict at LVS? Soft check or Stamping conflict Error comes under ERC check. Soft Connect is…
We used Contact(via0) in between diffusion and poly Because contact(via0) is made with tungsten filament while via1,via2, and via3 are made…
What is the role of ERC in VLSI? ERC stands for Electrical Rule Check. It checks all possibilities of Electrical connection…